
DMS 3.1 EN 01/2011 TD17 L 125
Control technology | EtherCAT communication manual
Defining the minimum cycle time of the PLC project
Calculating the total access time to the peripheral devices (T
Correction
)
10 Defining the minimum cycle time of the PLC project
This chapter will inform you on how the minimum cycle time of the PLC project can be
defined.
The minimum cycle time is calculated in three steps:
1. Calculating the total access time T
Correction
to the peripheral devices.
Calculating the total access time to the peripheral devices (T
Correction
) ( 125)
2. Detecting the task utilisation T
Task utilisation
of the application during operation.
Detecting the task utilisation of the application (T
Task utilisation
) ( 126)
3. Calculating the minimum cycle time.
Calculating the minimum cycle time
( 128)
4. Optimising the system.
Optimising the system
( 129)
10.1 Calculating the total access time to the peripheral devices (T
Correction
)
The cycle times depend on the number of configured field devices and the IPC hardware
used.
Example
Configuration Access time with processor
Intel Celeron
600 MHz
Intel Celeron
1GHz
Intel Celeron
1.5 GHz
Intel Pentium M
1.8 GHz
EtherCAT bus:
Axis_IO_Group and
IO_Group
160 μs 130 μs 100 μs90 μs
EtherCAT bus:
per motion axis or
logic field device
10 μs5 μs5 μs5 μs
Note!
The LX 800 system is not supported with EtherCAT.
Configuration with Intel Celeron
1 GHz processor
Access time Total access time
Axis_IO_Group 130 μs
six Motion axes + 6 x 5 μs = 160 μs
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